Akramul Azim
PhD, PEng

Generation of Communication Schedules Using Component Interfaces

With the growing demand in embedded systems, safety and non-safety critical parts are integrated together although guaranteeing safety is a hard problem to tackle due to the complexity of possible interactions between components involving communication. However, it is sufficiently recognized that separation of computation and communication can reduce the complexity of guaranteeing safety involved in interactions between components. In this work, we propose to use component interfaces derived from periodic resource supplies that can meet the demand of components experiencing bounded delays. The advantage of using interfaces is to provide minimal information of components without requiring the entire task specifications to generate a multi-mode communication schedule. We use integer linear programming to find assignments in generating schedules that are guaranteed to have low average mode change delay. A video-monitoring case study demonstrates the advantages of using our approach in generating communication schedules.

Generation of Communication Schedules for Multi-Mode Distributed Real-Time Applications

A key problem in designing multi-mode, real-time systems is the generation of schedules to reduce the complexities of transforming the model semantics to code. Moreover, distributed multi-mode applications are prone to suffer from delays incurred during mode changes. We therefore aim to generate communication schedules that have low average mode-change delay for multi-mode, real-time distributed applications. In this paper, we use optimization constraints associated to timing requirements to generate state-based schedules for multi-mode communication systems, and illustrate the workflow for generating schedules from specifications through a real-time, video-monitoring case-study. Our experiments in the case-study demonstrate that schedules generated using the proposed method reduce the average mode-change delay in relation to a randomized algorithm and the well-known EDF scheduling algorithm.

An Efficient Periodic Resource Supply Model for Workloads with Transient Overloads

Real-time applications have deadline constraints. The system should provision sufficient resources for the application to meet the deadlines, and use supply and demand-bound functions to analyze the schedulability of workloads. The concept of the demand-bound function describes the upper bound on the resources required by the application, while the supply bound function specifies the lower bound on the resources supplied to the tasks. If the system provides fewer resources than required, the application will experience an overload. Most work concentrates on designing systems that cannot experience short periods of overloads. This work explores resource provisioning for control applications that can tolerate overloads. It introduces analysis techniques for supply and demand bound functions that specifically consider overloads and delays in a periodic resource model. With this extended model, the work addresses three problems: (1) determine the worst-case delay for a given resource demand and supply under a periodic resource model, (2) find a periodic resource supply for a given workload and worst-case tolerable delay, and (3) for a control system with a given robustness criterion, identify a periodic resource supply with a worst-case delay.

Compilation Validation: US Patent No. US 20140304687 A1

A system and method for compilation validation uses a second compiler, in addition to the compiler under test, to generate intermediate code (a.k.a. certificates). A checker processes the output of the two compilers and generates a statement of correctness regarding the output of the compiler under test.

View more - Compilation Validation: US Patent No. US 20140304687 A1

Compilation Validation: EP 2787435 A1

Compilation validation has several advantages that may overcome some of challenges of compiler validation. It is easier to demonstrate the correctness of a compilation than the correctness of the compiler because it is usually easier to check the result of an algorithm than the algorithm itself. Compilation validation may be unaffected by changes to the compiler, and no additional work may be needed when changes are made. Compilation validation may be used with optimizing compilers as these compilers are notoriously difficult to validate.